SM Clock Locking
Cross-source consensus on SM Clock Locking from 1 sources and 5 claims.
1 sources · 5 claims
How it works
Benefits
Risks & contraindications
Comparisons
Highlighted claims
- SM clock locking reduces unused compute-core power during memory-paced decode while preserving HBM speed. — The Illusion of Power Capping in LLM Decode: A Phase-Aware Energy Characterisation Across Attention Architectures
- At 780 MHz and sequence length 1024, every tested architecture saved substantial power with less than 1% throughput loss. — The Illusion of Power Capping in LLM Decode: A Phase-Aware Energy Characterisation Across Attention Architectures
- The extra frequency from 1590 MHz to the effective 1830 MHz region increased power without improving decode throughput. — The Illusion of Power Capping in LLM Decode: A Phase-Aware Energy Characterisation Across Attention Architectures
- The tested H200 did not sustain a requested 1980 MHz lock, instead clamping near 1830 MHz. — The Illusion of Power Capping in LLM Decode: A Phase-Aware Energy Characterisation Across Attention Architectures
- The H200 idle power floor limits how much underclocking can reduce total GPU power. — The Illusion of Power Capping in LLM Decode: A Phase-Aware Energy Characterisation Across Attention Architectures